教師著作
Permanent URI for this collectionhttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/31268
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Item The Low-Cost RF-CMOS 60-GHzTransceiver(2007-03-01) Tian-Wei Huang; Chi-Hsueh Wang; Hong-Yeh Chang; Pei-Si Wu; Kun-You Lin; Jeng-Han Tsai,Chin-Shen Lin; Huei Wang; Chun Hsiung ChenItem A 30-GHz Low-Phase-Noise 0.35-μm CMOS Push-Push Oscillator Using Micromachined Inductors(2006-06-16) To-Po Wang; Ren-Chieh Liu; Hong-Yeh Chang; Jeng-Han Tsai; Liang-Hung Lu; Huei WangA low-phase-noise 0.35-mum CMOS push-push oscillator utilizing micromachined inductors is presented in this paper. With the micromachined high-Q inductors, the oscillator achieves an oscillating frequency of 30.9 GHz while exhibiting an output power of -4 dBm with a low phase noise of -102.3 dBc/Hz at 1-MHz offset and the figure of merit (FoM) of -171.4 dBc/Hz. The fundamental rejection is 30 dB. This oscillator achieves low phase noise, good FOM, high output power, and also demonstrates the highest operating frequency among previously published Si-based and GaAs-based VCOs using micromachined structuresItem A compact 35-65 GHz up-conversion mixer with integrated broadband transformers in 0.18-μm SiGe BiCMOS technology(2006-06-01) Ping-Chen Huang; Ren-Chieh Liu; Jeng-Han Tsai; Hong-Yeh Chang; Huei Wang; John Yeh,Chwan-Ying Lee; John ChernThis paper presents a compact 35-65 GHz Gilbert cell up-convert mixer implemented in TSMC 0.18- ȝm SiGe BiCMOS technology. Integrated broadband transformers and meandered thin-film microstrip lines were utilized to achieve a miniature chip area of 0.6 mm × 0.45 mm. The compact MMIC has a flat measured conversion loss of 7 ± 1.5 dB and LO suppression of more than 40 dB at the RF port from 35 to 65 GHz. The power consumption is 14 mW from a 4-V supply. This is a fully integrated millimeterwave active mixer that has the smallest chip area ever reported, and also the highest operation frequency among up-conversion mixers using silicon-based technology.Item Design and analysis of a 44-GHz MMIC low-loss built-in linearizer for high-linearity medium power amplifiers(IEEE Microwave Theory and Techniques Society, 2006-06-01) Jeng-Han Tsai; Hong-Yeh Chang; Pei-Si Wu; Yi-Lin. Lee; Tian-Wei Huang; Huei WangA 44-GHz monolithic microwave integrated circuit (MMIC) low-loss built-in linearizer using a shunt cold-mode high-electron mobility transistor (HEMT), based on the predistortion techniques, is presented in this paper. The proposed cold-mode HEMT linearizer can enhance the linearity of the power amplifier (PA) with a low insertion loss (IL<2 dB), a compact die-size, and no additional dc power consumption. These advantages make the linearizer more suitable for millimeter-wave (MMW) applications. The physical mechanism of the gain expansion characteristics of the proposed linearizer is analyzed. A systematic design procedure for a low-loss linearizer is developed, which includes: 1) insertion loss minimization through a device-size selection and 2) linearity optimization through a two-tone test. To demonstrate the general usefulness of the proposed linearizer, the linearizer was applied to a two-stage 44-GHz MMIC medium PA and a commercial MMW PA module. After linearization, the output spectrum regrowth is suppressed by 7-9 dB. To keep the adjacent channel power ratio below -40 dBc, the output power has been doubled from 15 to 18 dBm at 44 GHz. The error vector magnitude of the 16-quadrature amplitude modulation signal can be reduced from 6.11% to 3.87% after linearization. To the best of our knowledge, this is the first multistage MMW PA with a low-loss built-in linearizerItem A W-band high-power predistorted direct-conversion digital modulator for transmitter applications(IEEE Microwave Theory and Techniques Society, 2005-09-01) Hong-Yeh Chang; Jeng-Han Tsai; Tian-Wei Huang; Huei Wang; Yongxiang Xia; Yonghui ShuThis letter presents a W-band high-power direct-conversion transmitter using digital predistortion techniques for digital modulation applications. The transmitter is a direct-conversion configuration that employs a reflection-type IQ modulator module and a power amplifier module. With the predistortion function in digital signal processing (DSP), this transmitter demonstrated an output channel power of greater than 19 dBm, and the adjacent channel power ratio (ACPR) was improved by 10 and 18 dB for QPSK and π/4-DQPSK modulation, respectively. To the best of our knowledge, this is the first demonstration of linearization techniques for W-band high-power digital modulation transmitters.Item Design and analysis of a 77.3% locking-range divide-by-4 frequency divider(IEEE Microwave Theory and Techniques Society, 2011-10-01) Yen-Hung Kuo; Jeng-Han Tsai; Hong-Yeh Chang; Tian-Wei HuangA cascoded frequency divider (FD) with division number of 4 and ultra-wide locking range is presented in this paper. The proposed FD consists of a divide-by-2 (D2) injection-locked frequency divider (ILFD) core and a D2 source-injection current mode logic (SICML) divider. After the cascoded integration of ILFD and SICML, the removal of transconductance and buffer stages can lower the dc power consumption and widen the locking range. The proposed FD is implemented in 0.13-μm CMOS technology and has a 77.3% frequency locking range from 13.5 to 30.5 GHz at injection power of 0 dBm while consuming 7.3-mW dc power. Compared to the previously reported ILFDs, the proposed circuit achieves the widest locking range without employing extra tuning mechanism.