教師著作
Permanent URI for this collectionhttp://rportal.lib.ntnu.edu.tw/handle/20.500.12235/31268
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Item V-band fully-integrated CMOS LNA and DAT PA for 60 GHz WPAN applications(2010-09-30) Wei-Heng Lin; Yung-Nien Jen; Jeng-Han Tsai; Hsin-Chia Lu; Tian-Wei HuangA V-band low-noise amplifier (LNA) and a distributed active transformer (DAT) power amplifier (PA) using 130 nm standard MS/RF CMOS technology are presented in this paper. The three-stage LNA features 20�0.5 dB flat gain from 56-64 GHz and the minimum noise figure is 6.9 dB at 60 GHz at 2.4-V supply. The three-stage PA with four-time power combination in DAT structure achieves a peak gain of 21.1 dB at 58 GHz, OP1dB of 8.34 dBm, Psat of 13 dBm, and PAE of 6.4% under 2.4-V supply voltage. It also achieves 17.5 dB gain, OP1dB of 6.74 dBm, Psat of 11.6 dBm, and 4.4% PAE at 60 GHz. Thin-film microstrip line is used for matching circuits and compact the chip size, the LNA and PA die area including all pads are 0.67 � 0.57 and 0.85 � 0.80 mm2, respectively. The LNA and PA MMICs demonstrate the superior gain and power performance in 130-nm CMOS process.Item Design of a K-band Low Insertion Loss Variation Phase Shifter Using 0.18- μm CMOS Process(2010-12-10) Chung-Han Wu; Wei-Tsung Li; Jeng-Han Tsai; Tian-Wei HuangThis paper demonstrates a k-band low insertion loss variation phase shifter with over 330° continuously phase tuning range from 21-25GHz in standard 0.18-μm CMOS technology. This phase shifter is composed of a 180° continuously phase tuning range reflection type phase shifter (RTPS) and a 180° discrete switch type phase shifter (STPS). The measured phase shift range is 336° with low loss variation of 1.3dB at 22GHz and the maximum insertion loss is 16 dB at 22GHz. To the best of authors' knowledge, the MMIC is the lowest insertion loss variation phase shifter in CMOS technology at 22GHz.Item A V-band VCO using fT-doubling technique in 0.18-μm CMOS(2011-12-08) Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei Huang; Huei WangA low supply voltage V-band voltage-controlled oscillator (VCO) using fT-doubling technique is presented in this paper. The proposed VCO is fabricated in 0.18-μm CMOS technology. The proposed VCO adopts the fT-doubling technique to eliminate the gate-to-source capacitance of cross-coupled pair of VCO. The oscillation frequency of VCO can be increased due to the parasitic capacitance is eliminated. The measured results show that the proposed VCO have tuning range of 0.74 GHz from 58.09-to-58.83 GHz. The proposed VCO consumes 4 mW dc power from 1.2 V supply voltage.Item Admittance-Transforming Injection-Locked Frequency Divider and Low-Supply-Voltage Current Mode Logic Divider(2010-12-10) Yen-Hung Kuo; Jeng-Han Tsai; Wei-Hung Chou; Tian-Wei HuangA injection-locked frequency divider (ILFD) with a 0.8-V current mode logic (CML) frequency divider are presented in this paper. These two frequency dividers are fabricated and integrated in 0.13-μm CMOS technology. The proposed ILFD adopts the admittance-transforming to widen the locking range. To achieve low-supply-voltage in CML frequency divider, the transconductance stage of CML divider is replaced by the inductance. Under 0 dBm injected power, the measured results show that the proposed ILFD have 22.8 % bandwidth from 40.5-to-50.9 GHz. Furthermore, the divider-by-four frequency divider composed of an ILFD and CML divider are measured with locking range from 42 to 45 GHz. The ILFD and CML divider consume 3.6 mW and 8 mW dc power from 0.6 V and 0.8 V supply voltage, respectively.Item A 50-70 GHz I/Q modulator with improved sideband suppression using HPF/LPF based quadrature power splitter(2011-06-10) Yi-Chien Tsai; Jing-Lin Kuo; Jeng-Han Tsai; Kun-You Lin; Huei WangThis paper presents a 50-70 GHz wideband I/Q modulator with improved sideband suppression. The sideband suppression improvement results from the on-chip HPF/LPF based broadband quadrature power splitter. The I/Q modulator exhibits conversion gain of -6 to -2 dB from 50-70 GHz. The LO-RF isolation is better than 36 dB. The sideband suppression is better than 19 dBc from 50 to 75 GHz.Item A 3.5-4.5-GHz ultra-compact 0.25mm square reflection-type 360 degree phase shifter(2011-06-07) Wei-Tsung Li; Jeng-Han Tsai; Min Huang; Tian-Wei HuangAn ultra-compact reflection-type phase shifter (RTPS) with full 360° continuous phase shift and low insertion loss using standard 0.18-μm CMOS technology is demonstrated in this paper. Dual active reflection load using active inductor is utilized in the proposed reflection-type load to cover 360 ° phase tuning through only one quadrature hybrid, which has the advantages of compact chip size, low insertion loss, and low loss variation. Measurements show better than 15 dB input/output return loss, signal losses of 6.4dB±1.5dB, less than 2.4dB±0.6 dB loss variation, and a 360 ° continuously tunable range across 3.5~4.5 GHz with 3.4mW dc power consumption. To the best of our knowledge, the proposed phase shifter has the smallest die size, 0.25 mm2, among all reported 360° C-band CMOS RTPS, which is important for a large phase array system.Item A 1.5-mW, 23.6% frequency locking range,24-GHz injection-locked frequency divider(2010-09-30) Yen-Hung Kuo; Jeng-Han Tsai; Tian-Wei HuangA K-band low-power and wideband injection-locked frequency divider (ILFD) using 0.18-μm CMOS technology is presented in this paper. To achieve the wide-locking-range and low-power consumption, the inductive peaking and current-reused techniques are adopted. The measurement results show that the proposed ILFD has a locking range of 5.5 GHz (23.6%), from 20.5 to 26 GHz, at the incident power of 0 dBm, with a very low power consumption of 1.5 mW. Among 180 nm and 130 nm CMOS frequency dividers, the proposed ILFD achieves wide locking range with the lowest dc power and RF injected power at K-band.Item An ultra low-power 24 GHz phase-lock-loop with low phase-noise VCO embedded in 0.18-μm CMOS process(2011-12-08) Yu-Hsuan Lin; Jeng-Han Tsai; Yen-Hung Kuo; Tian-Wei HuangA 24 GHz 29.8 mW Phase-lock-loop using 0.18 μm CMOS technology is presented in this paper. To achieve the low-power issue and low phase-noise performance, a transformer feedback voltage control oscillator and a cascoded divider of injection-locked frequency divider and current mode logic divider for low voltage and low power are implemented. The phase-lock-loop phase noise was measured by -122 dBc/Hz at 10 MHz offset with low supply voltage and equipped the locking range of 20.80-23.37 GHz. The PLL dissipate 29.8 mW (only 13.3 mW in VCO + ILFD) and occupies the total area of 0.39 mm2 without off-chip loop filter.Item A 24-GHz 3.8-dB NF Low-Noise Amplifier with Built-In Linearizer(2010-12-10) Yen-Hung Kuo; Jeng-Han Tsai; Wei-Hung Chou; Tian-Wei HuangA K-band low-noise amplifier with built-in linearizer using 0.18-μm CMOS technology is presented in this paper. To achieve good linearity at high frequency, a distributed derivative superposition linearization technique is used. The measured results show that the improvement of IIP3 and IM3 are 5.3 dB and 10.6 dB at 24 GHz, respectively. The proposed LNA has a noise figure of 3.8 dB and a peak gain of 13.7 dB while consuming 18 mW dc power. To the best of our knowledge, this is the first LNA with a built-in linearizer above 20 GHz in CMOS.Item Design of 40-108 GHz low-power and high-speed CMOS up/down-conversion ring mixers for multi-standard MMW radio applications(IEEE Microwave Theory and Techniques Society, 2012-03-01) Jeng-Han TsaiIn this paper, a pair of broadband, low-LO-power, low-dc-power, and high-speed up/down-conversion ring mixers are presented for multistandard millimeter-wave (MMW) radio applications. By employing a weak inversion biasing technique, the ring mixer can operate at a low LO drive level and low dc power while maintaining reasonable conversion gain performance. In addition, an IF transimpedance amplifier (TIA) buffer and wideband RF design are introduced to increase the operation speed of the mixer for MMW wireless Gigabit transmission. Using a 90-nm CMOS low-power process, the up-/down-conversion ring mixers are designed and fabricated based on the presented topology. The down-conversion ring mixer and up-conversion ring mixer exhibit flat measured conversion gain of -1 � 2 dB and 0 � 2 dB and dB from 40 to 110 GHz and 40 to 108 GHz, respectively. After biasing the transistors of the ring mixer core at weak inversion region, the presented down-conversion and up-conversion ring mixers can operate at low LO drive power, -2 and 0 dBm, respectively, even up to 100 GHz. For MMW wireless gigabit communication, gigabit binary phase-shift keying modulation signal test is successfully performed through a direct-conversion system in this work. The presented ring mixers are suitable for 60-GHz wireless personal area network, -E-band (71-76 GHz, 81-86 GHz, and 92-95 GHz) wireless fiber, and 77-GHz anti-collision radar applications.