氮化鎵高電子遷移率電晶體中表面陷阱誘導閘極漏電的低溫溫度依賴性及其滯後現象之研究

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2024

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本研究聚焦於蕭特基閘極氮化鎵高電子遷移率電晶體中表面陷阱輔助的閘極漏電現象,並分析其在 1.5 K 到 300 K 溫度範圍中的行為。在小的閘極電壓下,觀察到表面漏電由二維變程跳躍(two-dimensional variable-range hopping)主導。在較高的負閘極偏壓下,與電場相關的普爾—法蘭克發射(Poole–Frenkel emission)成為 200 K 以上的主要表面漏電機制。由於凍結陷阱效應(frozen-trap effect)隨著降溫而增強,低溫抑制了普爾—法蘭克發射,使得陷阱輔助穿隧(trap-assisted tunneling)變得明顯,逐漸成為主要的表面漏電機制。根據普爾—法蘭克發射模型的擬合結果,得到陷阱態的能階為 0.65 eV。元件亦展現出閘極漏電流的滯後行為,即表面漏電流不僅受到閘極電壓影響,也受其掃描方向及速率影響。此外,閘極漏電流滯後行為有明顯的溫度依賴性:在高溫下,由普爾—法蘭克發射引發的漏電流滯後有順時針的迴線,並且幾乎不受掃描閘極電壓的速率影響;而低溫下,由陷阱輔助穿隧引發的滯後迴線則為逆時針,並且在更高速的閘極電壓掃描下有著更明顯的滯後迴線。更深入地理解這些機制在不同溫度下對元件可靠性的影響,有助於未來用於低溫環境的氮化鎵元件的開發與優化。
This thesis focuses on the surface-trap-induced gate leakage phenomena in Schottky-gate GaN high-electron-mobility transistors (HEMTs), analyzing their behavior across the temperature range of 1.5 to 300 K. At low gate voltages, surface leakage is dominated by two-dimensional variable-range hopping. At higher negative gate biases, Poole–Frenkel emission, associated with electric fields, becomes the dominant surface leakage mechanism above 200 K. The frozen-trap effect is enhanced by decreasing temperature, suppressing Poole–Frenkel emission, and bringing trap-assisted tunneling to the forefront as the main leakage mechanism. Based on the Poole–Frenkel emission model fitting, the trap energy level is determined to be 0.65 eV. The devices also exhibit hysteresis in gate leakage current, which means the gate leakage current is influenced not only by gate voltage but also by sweep direction and speed. Furthermore, the hysteresis behavior shows significant temperature dependence: at high temperatures, hysteresis induced by Poole–Frenkel emission follows a clockwise loop and is nearly unaffected by the sweep speed of gate voltage, whereas at low temperatures, hysteresis due to trap-assisted tunneling follows a counterclockwise loop and becomes more pronounced under faster gate voltage sweeps. A deeper understanding of these mechanisms and their temperature-dependent effects on device reliability will aid in the development and optimization of GaN-based devices for low-temperature applications.

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氮化鎵, 高載子遷移率電晶體, 閘極漏電流, 表面陷阱, 低溫, 滯後, GaN, HEMT, gate leakage, surface traps, cryogenic, hysteresis

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