雙層鐵電氧化鉿鋯於平面式與環繞式閘極電晶體之特性研究

Abstract

近年來，由於鐵電材料具有雙穩態特性，在記憶體領域得到廣泛的研究，鉿基氧化物的鐵電材料由於具有與CMOS製程相容，取代傳統鐵電材料鈣鈦礦成為研究的主流，因此本論文研究鉿鋯氧化物(HfZrO2, HZO)作為鐵電記憶體的應用。此論文首先調控鐵電電容器(Metal/Ferroelectric/Metal, MFM)的電極，鉬(Mo)電極與氮化鈦(TiN)電極相比具有低熱預算、增強鐵電特性(殘餘極化)與降低操作電壓。第二部份為雙層HZO之場效電晶體(ferroelectric FET, FeFET)結構來演示多位元特性於多階記憶體(Multi-Level Cell, MLC)應用。最後，將二氧化矽和多晶矽沉積於矽晶圓上來取代絕緣層上覆矽(Silicon On Insulator, SOI)晶圓，之後使用原子層沉積(Atomic Layer Deposition , ALD)沉積雙層HZO包覆整個通道來製作環繞式閘極電晶體，並在雙層HZO中的夾層，設計氧化鋁(Al2O3)和TiN兩種材料，其中量測結果顯示於Al2O3與TiN相比具有優異的記憶窗口，但是需要較大的操作電壓。

In recent years, ferroelectric materials have been widely studied in the field of memory due to bi-stable characteristics. Especially, the HfO2-based material with ferroelectricity is compatible with the current CMOS process, and attracts lots of attention as compared with conventional ferroelectric Perovskite material. Therefore, this thesis will focus on HfZrO2 (HZO) for ferroelectric memory applications.Firstly, the modulation of the electrodes was performed for ferroelectric capacitors (Metal/Ferroelectric/Metal, MFM). The Mo electrode has several advantages as compared with TiN, such as low thermal budget, higher remnant polarization, and lower access voltage. The second part is the double-HZO FeFET (ferroelectric FET), which demonstrates the multi-bit characteristic for MLC (Multi-Level Cell) application.Finally, the polysilicon was employed to replace the SOI (Silicon on Insulator) wafer. The double HZO conformal deposited on the GAA (Gate-all-around) FET by ALD (Atomic Layer Deposition). Two designs for the insert layer with Al2O3 and TiN for the double HZO FET. The measurement results show that Al2O3 has the superior Memory Window (MW) as compared with TiN. Note that the higher access voltage is necessary.