28 GHz I/Q調變器與單邊帶混頻器設計

Abstract

隨著第五代行動通訊技術的發展，毫米波升降頻收發機扮演著重要的角色，其中發射機需將基頻訊號升頻至毫米波頻段後，再透過相位陣列(Phased Array)天線進行無線傳輸，因此調變器與混頻器成為不可或缺的元件。近年來得益於互補式金氧半導體製程(CMOS)的進步，CMOS具有低功率消耗、低成本及高整合度的優勢，且已經可以與大部分的射頻電路整合在一塊。本論文將使用TSMC 90-nm CMOS RF製程與TSMC 65-nm CMOS RF製程，設計實現28 GHz I/Q調變器與單邊帶混頻器。第一個電路為28 GHz I/Q調變器，以I/Q調變訊號的方式饋入兩顆混頻器來消除鏡像訊號，並透過加入匹配來達成寬頻的鏡像拒斥比。量測與模擬之特性貼近。當電晶體偏壓為0.35 V，LO驅動功率為3 dBm時，頻帶為25~32 GHz，增益範圍為-9.4 ± 0.5 dB，鏡像拒斥比則有-30 dBc，整體晶片佈局面積為730 μm × 700 μm。第二個電路為28 GHz單邊帶混頻器，藉由給予兩顆混頻器正交訊號，將相位差180°的輸出訊號合成後，會達到鏡像抑制之功能。由於LO端匹配電容對於製程變異相當敏感，因此最後實現的單邊帶混頻器有頻飄的狀況。當電晶體偏壓為0.35 V，LO驅動功率為3 dBm時，頻帶為23~28 GHz，增益範圍為-22.5 ± 0.5 dB，鏡像拒斥比則有-30 dBc，整體晶片佈局面積為755 μm × 730 μm。

As the progress of the fifth-generation mobile communication technology, millimeter wave transceivers play an important role, the transmitters need to up-convert the baseband signal to the millimeter wave frequency band and then perform wireless transmission through a phased array antenna design. Therefore, modulators and mixers become indispensable components. Recently, thanks to advances in Complementary Metal Oxide Semiconductor (CMOS) process. The modern CMOS process has the advantages of low power consumption, low cost and high integration, and it is suitable for the implementation of the RF circuits. In this thesis, a 28 GHz I/Q Modulator and a Single-Sideband Mixer (SSB Mixer) are presented, and implemented in TSMC 90-nm CMOS RF technology and TSMC 65-nm CMOS RF technology, respectively.The first circuit is a 28 GHz I/Q modulator, which eliminates the image signal by applying I/Q modulation signals into two mixers, and achieves a wide-band image rejection ratio by adding matching network. The characteristics of measurement and simulation have good agreement. When the gate bias is 0.35 V and LO drive power is 3 dBm, the conversion gain is -9.4 ± 0.5 dB from 25 to 32 GHz with the image rejection ratio of -30 dBc. The chip size is 730 μm × 700 μm.Second, a 28 GHz SSB Mixer has designed and implemented. By applying quadrature signals into two mixers, the two output signals with 180° phase difference are combined to achieve the image suppression function. However, the LO matching capacitor is sensitive to the process variation. Therefore, the SSB Mixer frequency shifted. When the gate bias is 0.35 V and LO drive power is 3 dBm, the conversion gain is -22.5 ± 0.5 dB from 23 to 28 GHz with the image rejection ratio of -30 dBc. The chip size is 755 μm × 730 μm.