應用於K/Ka頻段積體電路之靜電放電防護設計

Abstract

本論文設計之電感嵌入矽控整流器的靜電放電防護元件可在共振的頻率之下使電路的小訊號增益損耗降低，只要選擇正確的電感感值便可以達成目標。此外，矽控整流器能在最小的面積下提供最高的靜電放電耐受度，達成較佳的電路靜電放電防護能力。

為了驗證靜電放電防護元件在實際電路上的效能，本論文同時設計了一個低雜訊放大器電路，並且裝備本論文所提出之電感嵌入矽控整流器的靜電放電防護元件，在實驗結果比較中，本論文所提出的設計並不會降低電路的小訊號增益。

本論文中的所有電路皆使用0.18um CMOS製程實現。透過實驗分析比較結果，本論文所提出的設計確實能夠達成良好的靜電放電防護能力，使電路能夠承受4kV的人體放電模式之靜電放電測試，證明電路能夠有效地被該元件保護。An inductor-assisted silicon-controlled rectifier (LASCR) electrostatic discharge (ESD) protection device was designed in this study. The signal loss under the resonant frequency can be reduced by selecting the appropriate inductor in the LASCR. Furthermore, silicon-controlled rectifier has good ESD robustness and small layout area, and let circuit achieve good ESD protection ability.

In order to verify the protection ability of ESD protection device on the radio frequency (RF) circuit, a low-noise amplifier (LNA) circuit has been fabricated in this study, which equipped with LASCR ESD protection device. In the experimental results, the proposed design did not degrade the small-signal gain of the LNA circuit.

All devices and circuits in this study are fabricated in 0.18um CMOS process. Through analysis and comparison of the experimental results, the proposed design can achieve a good ESD protection ability. In the experimental results, the proposed design can bear 4kV HBM test without degrade the small-signal gain of the circuit. This proves that the circuit can be effectively protected by the LASCR.