V-band fully-integrated CMOS LNA and DAT PA for 60 GHz WPAN applications

Abstract

A V-band low-noise amplifier (LNA) and a distributed active transformer (DAT) power amplifier (PA) using 130 nm standard MS/RF CMOS technology are presented in this paper. The three-stage LNA features 20�0.5 dB flat gain from 56-64 GHz and the minimum noise figure is 6.9 dB at 60 GHz at 2.4-V supply. The three-stage PA with four-time power combination in DAT structure achieves a peak gain of 21.1 dB at 58 GHz, OP1dB of 8.34 dBm, Psat of 13 dBm, and PAE of 6.4% under 2.4-V supply voltage. It also achieves 17.5 dB gain, OP1dB of 6.74 dBm, Psat of 11.6 dBm, and 4.4% PAE at 60 GHz. Thin-film microstrip line is used for matching circuits and compact the chip size, the LNA and PA die area including all pads are 0.67 � 0.57 and 0.85 � 0.80 mm2, respectively. The LNA and PA MMICs demonstrate the superior gain and power performance in 130-nm CMOS process.