應用於毫米波相位陣列系統之相移器設計

Abstract

近年來隨著物聯網(Internet of Things, IOT)與第五代行動通訊(5th Generation Mobile Networks, 5G)帶動高速通訊的發展，資料傳輸需要更寬的頻寬來滿足大量傳輸需求，傳輸頻段必須往更高頻段移動，因此高頻訊號先天路徑損耗較大的問題變成必須克服的難題，本論文主要研究毫米波相位陣列系統之相移器設計，利用波束成形(Beamforming)技術來解決高頻傳輸路徑損耗過大問題。 第三章介紹ka頻帶五位元開關式相移器，電路採用電路採用標準0.18-μm 1P6M互補式金屬氧化物半導體製程(Standard 0.18-μm 1P6M CMOS process)實現，其中四個位元採用T橋式相移器架構，另一位元採用高低通網路架構。電路功率消耗為0mW，整體晶片面積為0.84 mm2，操作頻率為26GHz至31GHz，輸入反射係數小於-7.1dB、輸出反射係數小於-5.2dB、RMS相位誤差小於5.37°、RMS振幅誤差小於0.85dB。 第四章為了改善第三章相移頻寬，將90°相移器採用反射式架構，180°相移器採用相位可反相衰減器，其餘位元皆採用T橋式相移器架構。操作頻率為26至31GHz，電路功率消耗為0 mW，整體晶片面積0.64 mm2，輸入反射係數小於-13.4dB，輸出反射係數小於-5.5dB，RMS相位誤差小於3.07°，RMS振幅誤差小於1.06dB。 第五章介紹ka頻帶五位元開關式相移器，電路採用標準65-nm 1P9M互補式金屬氧化物半導體製程(Standard 65-nm 1P9M CMOS process)實現，為了降低相移器之間的負載效應，將180°相移器採用兩個90°T橋式相移器組成，使得五位元相移器皆採用T橋式相移器架構。電路功率消耗為0 mW，整體晶片面積為0.39mm2，操作頻率為36GHz至40GHz，輸入反射係數小於-8.8dB、輸出反射係數小於-8.2 dB、RMS相位誤差小於7.3°、RMS振幅誤差小於1.8 dB。 第六章介紹ka頻帶向量合成式相移器，相移解析度為5Bit，控制電路電壓解析度為6Bit，電路採用標準65-nm 1P9M互補式金屬氧化物半導體製程(Standard 65-nm 1P9M CMOS process)實現，電路功率消耗為6.6mW，整體晶片面積為0.37mm2，操作頻率為36GHz至40GHz，輸入反射係數小於-19.6dB，輸出反射係數小於-5.5dB，RMS振福誤差小於0.17dB，RMS相位誤差小於1.67°。

In recent years, with the development of high-speed communication between the Internet of Things and the fifth-generation mobile communication, data transmission requires a wider bandwidth to meet a large number of data transmission, transmission frequency must move to a higher frequency to obtain high frequency bandwidth requirements. Therefore, the problem of high frequency signal intrinsic path loss becomes a problem that must be overcome. This paper studies the phase shifter design of millimeter wave phase array system, using beamforming. Technology to solve the problem of excessive loss of high frequency transmission path. Chapter3 introduces the ka-band five-bit switching phase shifter. The circuit is implemented by standard 0.18-μm 1P6M complementary metal oxide semiconductor process (Standard 0.18-μm 1P6M CMOS process), in which four bits adopt T-bridge. The phase shifter architecture uses another high-low-pass network architecture. The circuit power consumption is 0mW, the overall chip area is 0.84 mm2, the operating frequency is 26GHz to 31GHz, the input reflection coefficient is less than -7.1dB, the output reflection coefficient is less than -5.2dB, the RMS phase error is less than 5.37°, and the RMS amplitude error is less than 0.85dB Chapter4 improve the problem of poor phase shift bandwidth in Chapter 3, the 90° phase shifter adopts Reflection Type Pahse Shifter (RTPS) and the 180° phase shifter uses phase Invertible Variable Attenuator(PIVA), the remaining bits are all T-bridge architecture. The operating frequency is 26 to 31 GHz, the circuit power consumption is 0 mW, the overall wafer area is 0.64 mm2, the input reflection coefficient is less than -13.1 dB, the output reflection coefficient is less than -5.5 dB, the RMS phase error is less than 3.07 °, and the RMS amplitude error is less than 1.06 dB. Chapter5 introduces the ka-band five-bit switching phase shifter. The circuit is implemented by standard 65-nm 1P9M complementary metal oxide semiconductor process (Standard 65-nm 1P9M CMOS process), in order to reduce the load effect between phase shifters. The 180° phase shifter is composed of two 90° T bridge phase shifters, so that the five-bit phase shifter adopts the T-bridge phase shifter architecture. The circuit power consumption is 0 mW, the overall chip area is 0.39mm2, the operating frequency is 36GHz to 40GHz, the input reflection coefficient is less than -8.8dB, the output reflection coefficient is less than -8.2dB, the RMS phase error is less than 7.3°, and the RMS amplitude error is less than 1.8 dB. Chapter6 introduces the Ka-band vector synthesis phase shifter. The circuit is implemented by the standard 65-nm 1P9M complementary metal oxide semiconductor process (Standard 65-nm 1P9M CMOS process), the phase shift resolution is 5Bit, and the control circuit is adjustable. With a resolution of 6Bit, this architecture provides an adjustable continuous phase. In practice, a 6Bit Digital Analog Converter (DAC) must be integrated. The circuit power consumption is 6.6mW, the overall chip area is 0.37mm2, the input reflection coefficient is less than -19.6dB, the output reflection coefficient is less than -5.5dB, the RMS vibration error is 0.17dB, and the RMS phase error is 1.67°