特徵提取型同時定位與建圖演算法及其在FPGA之實現

Abstract

FastSLAM 為解決同時定位與建圖的有效方法，但由於地標數過多，容易造成運算量過於龐大而導致系統發散。原始的快速同時定位及建圖(Fast Simultaneous Location and Mapping, FastSLAM)收斂效果好，但會因為地標數目增加所造成誤差的累積，而導致系統發散，論文中透過向量比對機制，使得特徵變化較大的感測資訊被保留下來，減少與現有地標比對的機會，且使得資料關聯的結果較為準確，最後更利用準確的地標更新機器人的位置以提升定位精準度。為了驗證論文所提出方法可以確實有效提升精確度以及降低其運算量，將會利用傳統FastSLAM與本論文所提出之特徵提取型SLAM以多種不同地圖進行模擬並比較其結果。同時，本論文也使用FPGA晶片將此改良同時定位及建圖實現於硬體電路以縮短運算時間，並增加其演算法之運用性。FastSLAM is an effective method to solve simultaneous localization and mapping. However, when the number of landmarks increases, more comparisons of the current measurements with all the existing landmarks in particles will be compared and the accuracy of the estimated location of the robot and landmark decreases because of incorrect data association. In order to solve this problem, this thesis presents an enhanced architecture for FastSLAM called Feature Extracting SLAM (FESLAM), where current measurement is filtered to extract special measurement to avoid getting unnecessary and wrong landmarks. To further refine the robot pose, we use triangulation and set on maximum likelihood mapping framework. Simulation results show the proposed approach has a better performance in terms of better localization and mapping than those obtained by the traditional SLAM algorithms. To further reduce the computation time, the improved SLAM system algorithm is realized on FPGA circuit using a DE2i-150 to verify the practicability of the proposed algorithm. Experimental results show the execution efficiency of FESLAM is significantly improved by the full hardware design for embedded applications.