利用波長365nm黃光微影製程之奈米微結構

Abstract

鰭型電晶體有利於微縮以獲得更好閘極控制能力，本實驗欲透過波長365nm黃光微影製程方式，而非電子束直寫（E-beam Direct Write, EBDW），將鰭型線寬曝光至奈米鰭/奈米牆，但若只是單純使用一般黃光微影製程的極限，是無法將線寬曝至奈米等級之理想值，故欲透過Dummy Fin 設計以保護與光罩本身結構設計，避免顯影時被沖斷，再者透過水平爐管熱氧化(Oxidation)方式，進一步對Fin本身進行二度線寬微縮，才有辦法將鰭型線寬(Fin Width)微縮至奈米級的線寬，而本論文則將奈米鰭/奈米牆成功達到8奈米線寬。Fin-type transistor has well gate control capability. This study will investigate photo lithography process to reach the nanometer scale fin/wall by wavelength 365nm without E-beam writer. We will design the dummy layout to protect and avoid damage the Fin. In order to further reduce Fin width, the thermal oxidation process is used to comsumpt Si and obtains the nano-scale line width. The nano Fin/wall is successfull demonstrated with Fin width 8nm in this thesis.